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four-channel supervisory ic copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 1 anpec reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to ob tain the latest version of relevant information to verify before placing orders. features general description applications ? graphics cards ? portable battery-powered equipment ? p voltage monitoring ? set-top boxes ? notebook computer ? multiple supply system ? ? ? ? ? 2.6v to 5.5v input voltage range ? ? ? ? ? low quiescent current : less than 50 a ? ? ? ? ? high accuracy detection threshold : 1.6% ? ? ? ? ? adjustable undervoltage lockout for each supply ? ? ? ? ? active high pgood output ? ? ? ? ? guaranteed pgood valid to falling v cc < 1v ? ? ? ? ? vmon glitch immunity : 30 s ? lead free available (rohs compliant) pinouts the apl6536 is a four channel supervisory ic de- signed to monitor voltage supplies in p and digital system. this ic can supervise any positive voltage using an external resistor divider to translate to a lower voltage for comparison to the internal 0.633v reference. once any vmon input falls below 0.633v the pgood output is pulled low, the hysteresis of the internal ref- erence is 15mv. the pgood pin has an internal 20k ? pull-up to v cc making an external pull-up resis- tor unnecessary. each rail?s vmon point is indepen- dently adjustable with a resistor divider. the pgood output is guaranteed to be valid with ic bias lower than 1v. this ic is designed to reject fast line tran- sient glitches 30 s on vmon input. the pgood out- put is an open-drain to allow oring of multiple signals. if less than four voltages are being monitored, connect the unused vmon pins to v cc . the enable input pin provides for a reset of the pgood output when it is pulled down below 0.5v. with an internal 10 a pull-up to v cc, it can be signaled with common logic or pulled to ground with a push button switch. apl6536 come in a miniature sop-8 package. pgood vmon2 1 2 3 8 6 4 7 5 vmon1 gnd enable vcc vmon4 vmon3 sop-8 top view apl6536
copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 2 apl6536 package code k : sop-8 temp. range i : -40 to 85 c handling code tu : tube tr : tape & reel lead free code l : lead free device blank : original device handling code temp. range package code apl6536 : apl6536 xxxxx xxxxx - date code lead free code pin function description ordering and marking information pin no. name i/o description 1 v cc supply voltage (2.6v to 5v) 2 pgood o pgood is the and function of all the vmon inputs being satisfied. this is an open drain output and can be pulled high to the appropriate level with an external resistor. additionally a 20k pull up to v cc is provided internally. 3 enable i enabling input for supervisory function. has a 10 a pull-up to v cc . 4 gnd ground connection 5-8 vmon1 vmon2 vmon3 vmon4 i these inputs provide for a programmable monitored voltage threshold referenced to an internal 0.633v reference. these inputs have a 30 s glitch filter to prevent transient upsets from being recognized by pgood. notes anpec lead-free products contain molding compounds/die attach materials and 100% matte in plate termination finish; which are fully compliant with rohs and compatible with both snpb and lead-free soldiering operations. anpec lead-free products meet or exceed the lead-free requirements of ipc/jedec j std-020c for msl classification at lead-free peak reflow temperature.
copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 3 block diagram absolute maximum ratings symbol parameter rating unit v cc input voltage 7 v vmon1-4,en all input pins -0.3v to v cc +0.3v v pgood output pin -0.3v to v cc +0.3v v t j maximum junction temperature 150 c t stg storage temperature -65 to +150 c t s soldering temperature (10 seconds) 260 c esd electrostatic discharge -3000 to 3000* 1 v note:1.human body model: c=100pf, r=1500 ? , 3 positives pulse plus 3 negative pulses. f a llin g e d g e glitch filter en vmon1 vmon2 vmon3 vmon4 pgood 10ua v cc (2.6~5.5v) 20k 1m 0.633v
copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 4 electrical characteristics unless otherwise noted these specifications apply over full temperature, v cc = 3.3v, t j =- 40 c to 85c typical values refer to t j =25c apl6536 symbol parameter test condition min. typ. max. unit bias vmon > vmon_ l2h 40 400 a i cc supply current (en enable) vmon < vmon_ h2l 230 2000 a vmon > vmon_ l2h 50 500 a i cc supply current (en disable) vmon < vmon_ h2l 50 500 a v cc_l2h v cc power on v cc low to high 2.6 v v cc_por v cc power on reset v cc high to low 2.4 v pgood pgpd pull-down current v pgood =0.5v 10 ma pgpu pull-up resistance 20 k ? v pgi output low v cc = 1v 0 100 mv tpg del vmon delay from vmon rising last valid input =vth to pg release 3 s tpg del enr delay from en rising en high to pg release 2 s tpg del enf delay from en falling en low to pg pulling low 10 ns enable v en rising threshold voltage enable low to high threshold 1.30 1.65 2 v v en_hys threshold hysteresis voltage 80 mv i enpu pull-up current v en = 0.5v 10 a vmon input vmon _h2l falling threshold voltage t j =25 c 0.623 0.633 0.643 v vmon _tc falling threshold temperature coeff. t j =-40 c to 85 c 100 v/ c vvmon _hys hysteresis voltage 15 mv vvmon _rng range 10 mv t fil glitch filter duration vmon glitch to pgood low filter 30 s
copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 5 electrical characteristics unless otherwise noted these specifications apply over full temperature, v cc = 5v, t j =- 40 c to 85c typical values refer to t j =25c apl6536 symbol parameter test condition min. typ. max. unit bias vmon > vmon _l2h 50 500 a i cc supply current (en enable) vmon < vmon _h2l 230 2000 a vmon > vmon _l2h 60 600 a i cc supply current (en disable) vmon < vmon _h2l 60 600 a v cc_l2h v cc power on v cc low to high 2.6 v v cc_por v cc power on reset v cc high to low 2.4 v pgood pgpd pull-down current v pgood =0.5v 10 ma pgpu pull-up resistance 20 k ? v pgi output low v cc = 1v 0 100 mv tpg del vmon delay from vmon rising last valid input = vth to pg release 5 s tpg del enr delay from en rising en high to pg release 2 s tpg del enf delay from en falling en low to pg pulling low 10 ns enable v en rising threshold voltage enable low to high threshold 2 2.5 3 v v en_hys threshold hysteresis voltage 80 mv i enpu pull-up current v en = 0.5v 10 a vmon input vmon _h2l falling threshold voltage t j =25 c 0.623 0.633 0.643 v vmon _tc falling threshold temperature coeff. t j =-40 c to 85 c 100 v/ c vvmon _hys hysteresis voltage 15 mv vvmon _rng range 10 mv t fil glitch filter duration vmon glitch to pgood low filter 30 s
copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 6 timing diagram application circuit 1 2 3 45 6 7 8 v cc pgd gnd vmon1 vmon2 vmon4 vmon3 en apl6536 5v 12v 5v 3.3v optional 1uf 10k 22k 10k 10k 2.7k 1.5k 2.7k 4.7k 0.47uf vcc pgood output copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 7 0.618 0.620 0.622 0.624 0.626 0.628 0.630 0.632 0.634 0.636 0.638 -40-200 20406080100120 0 10 20 30 40 50 60 70 -40 -20 0 20 40 60 80 100 120 0.630 0.633 0.636 0.639 0.642 0.645 0.648 0.651 2.6 3.1 3.6 4.1 4.6 5.1 5.6 0 50 100 150 200 250 300 350 400 2.6 3.1 3.6 4.1 4.6 5.1 5.6 typical characteristics supply current vs. supply voltage supply current vs. temperature vmon _h2l vs. temperature vmon threshold vs. supply voltage vmon _h2l (v) supply voltage(v) temperature( c ) temperature( c ) supply current(a) supply voltage(v) supply current(a) vmon>vmon _l2h vmonvmon _l2h v cc =3.3v vmon threshold(v) vmon _l2h vmon _h2l v cc =3.3v v cc =5v v cc =5v
copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 8 typical characteristics (cont.) vmon high to pgood time(4us/div) en low to pgood time(10ns/div) vmon low to pgood time(20 s/div) vmon(1v/div ) pgood(2v/div ) en(2v/div ) v cc =3.3v v cc =3.3v pgood(2v/div ) pgood(2v/div ) vmon(1v/div ) v cc =3.3v en high to pgood en(2v/div ) pgood(2v/div ) v cc =3.3v time(1us/div)
copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 9 application information pgood the apl6536 is a four channel supervisory ic designed to monitor multiple voltages greater than 0.7v. this ic is suitable for both microprocessors or industrial system applications. once biased to 2.6v and en- abled the ic continuously monitors from one to four voltages independently through external resistor di- viders comparing each vmon pin voltage to an inter- nal 0.633v reference. the pgood output is an open- drain to allow oring of the signals and interfacing to a wide range of logic levels. if less than four voltages are being monitored, connect the unused vmon pins to v cc . the pgood pin has an internal 20k ? pull-up to v cc making an external pull-up resistor unnecessary. falling edge glitch filter enable once any vmon input falls below 0.633v the pgood output is pulled low, the vmon inputs are designed to reject fast transients (30us). the apl6536 has an active high enable function. force en high (>=0.5v cc ) enables the pgood, en low(<=0. 5v) disables the pgood and enter the shutdown mode and it also causes the pgood to discharge through a 1m ? resistance to ground. in shutdown mode, the quiescent current can reduce below 60ua. with an internal 10ua pull-up to v cc , it can be sig- naled with common logic or pulled to ground with a push button switch.
copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 10 package information sop-8 pin ( reference jedec registration ms-012) h e e1 e2 0.015x45 d a a1 0.004max. 1 l millimeters inches dim min. max. min. max. a 1.35 1.75 0.053 0.069 a1 0.10 0.25 0.004 0.010 d 4.80 5.00 0.189 0.197 e 3.80 4.00 0.150 0.157 h 5.80 6.20 0.228 0.244 l 0.40 1.27 0.016 0.050 e1 0.33 0.51 0.013 0.020 e2 1.27bsc 0.50bsc 18 8
copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 11 t 25 c to peak tp ramp-up t l ramp-down ts preheat tsmax tsmin t l t p 25 temperature time critical zone t l to t p physical specifications terminal material solder-plated copper (solder material : 90/10 or 63/37 snpb), 100%sn lead solderability meets eia specification rsi86-91, ansi/j-std-002 category 3. reflow condition (ir/convection or vpr reflow) classificatin reflow profiles sn-pb eutectic assembly pb-free assembly profile feature large body small body large body small body average ramp-up rate (t l to t p ) 3 c/second max. 3 c/second max. preheat - temperature min (tsmin) - temperature mix (tsmax) - time (min to max)(ts) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds tsmax to t l - ramp-up rate 3 c/second max tsmax to t l - temperature(t l ) - time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(tp) 225 +0/-5 c 240 +0/-5 c 245 +0/-5 c 250 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 10-30 seconds 10-30 seconds 20-40 seconds ramp-down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note: all temperatures refer to topside of the package. measured on the body surface.
copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 12 reliability test program test item method description solderability mil-std-883d-2003 245 c , 5 sec holt mil-std-883d-1005.7 1000 hrs bias @ 125 c pct jesd-22-b, a102 168 hrs, 100 % rh , 121 c tst mil-std-883d-1011.9 -65 c ~ 150 c, 200 cycles esd mil-std-883d-3015.7 vhbm > 2kv, vmm > 200v latch-up jesd 78 10ms , i tr > 100ma carrier tape a j b t2 t1 c t ao e w po p ko bo d1 d f p1
copyright ? anpec electronics corp. rev. a.4 - mar., 2005 apl6536 www.anpec.com.tw 13 anpec electronics corp. head office : 5f, no. 2 li-hsin road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 taipei branch : 7f, no. 137, lane 235, pac chiao rd., hsin tien city, taipei hsien, taiwan, r. o. c. tel : 886-2-89191368 fax : 886-2-89191369 customer service reel dimensions application a b c j t1 t2 w p e 330 1 62 +1.5 12.75+ 0.15 2 0.5 12.4 0.2 2 0.2 12 0. 3 8 0.1 1.75 0.1 f d d1 po p1 ao bo ko t sop- 8 5.5 1 1.55 +0.1 1.55+ 0.25 4.0 0.1 2.0 0.1 6.4 0.1 5.2 0. 1 2.1 0.1 0.3 0.013 cover tape dimensions application carrier width cover tape width devices per reel sop- 8 12 9.3 2500 (mm)

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